Anup Gangwar, Ph.D.

Anup Gangwar obtained his Ph.D. from Department of Computer Science and Engineering, IIT Delhi in the year 2005; M.Tech in VLSI Design Tools and Technology (VDTT) from IIT Delhi in the year 2000; and B.E. in Electrical Communication Engineering from BIT in 1998.

He has worked at several organizations since 2004 including Calypto Design Systems (an EDA startup), Freescale Semiconductor, Montalvo Design Systems (a x86 processor startup), AMD and nVIDIA. In Calypto he was working on the front-end and compiler centric transformations for their tool. In Freescale he was leading the team responsible for porting and optimizing the Linux Kernel for their next generation SoC's. In Montalvo he was part of the performance analysis team responsible for providing performance bottleneck information to the architecture team. In AMD he was leading the processor verification effort as part of the core verification team. In nVIDIA he was leading the verification tools team working on an automatic test generator.

Anup has published 12 papers in highly cited and reputed conferences and journals including IJPP, ACM TODAES, MICRO, VLSI Design, DAC and DATE. He is the recipient of the VP Spotlight Award, AMD (2009); Best paper award, ACM TODAES (2007); Best presentation of a session award at IRISS (2004); and Philips Semiconductors scholarship during M.Tech (1999). He obtained 99.28 percentile, All India Rank 38 in GATE (1998).

Anup has been tinkering with the Linux kernel and GNU/Linux system in general for the last 15 years. His other technical interests are in computer architecture, operating systems, compilers, CAD for VLSI and embedded systems. He has reviewed papers for several conferences and journals including DAC, DATE, TODAES, IJPP, VLSI etc. He has also served on the program committee of VLSI Design (a premier conference on VLSI) for several years since 2008.

Basant Dwivedi, Ph.D.

Basant Dwivedi obtained his Ph.D. from Department of Computer Science and Engineering, IIT Delhi in the year 2005; M.Tech in VLSI Design Tools and Technology (VDTT) from IIT Delhi in the year 2000; and B.E. in Electronics Engineering from MNNIT in 1999.

Since 2004, he has worked at Calypto Design Systems (an EDA startup), CoWare and Synopsys (after acquisition of CoWare by Synopsys). At Calypto, Basant worked on several components of SLEC and PowerPro products including RTL and SystemC synthesis, netlist database optimizations, sequential analysis and SLEC-PowerPro integration. At CoWare (and later at Synopsys), Basant led Compiler and Platform Integration team of Processor Designer product which is extensively used for designing and verifying embedded processors.

Basant has published several papers in leading conferences including DAC, CODES, EMSOFT, RSP and VLSI. He is the recipient of Philips Semiconductors scholarship during M.Tech (1999), MNNIT merit scholarship holder during his B.E. and government merit scholarship holder throughout his schooling. He obtained 99.04 percentile, All India Rank 64 in GATE (1999) and All India Rank 10 during high school board examinations undertaken by more than 10 lakh students.

Basant's technical interests are in computer architecture, compilers, CAD for VLSI and embedded systems. He has reviewed papers for several conferences and journals including DAC, DATE, TODAES, VLSI design etc. He has served on the program committee of VLSI Design (a premier conference on VLSI) for several years since 2008.

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